Tag：fpga development
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Verilog Basic Syntax and Notes
basics 0.1 Modules A module in Verilog can be viewed as a black box with input and output ports, which has input and output interfaces (signals) to realize a function by putting inputs in the box to perform certain operations. (Similar to a function in C). Fig. 1 Schematic diagram of the module 0.1.1 Module […]
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vivado Error Summary 1 — WARING:[Labtools 27-3361] the debug hub core was not detected make sure the clock
I can’t open the debug screen of debug after program device, I get the following error: WARING:[Labtools 27-3361] the debug hub core was not detected make sure the clock connected to the debug hub core is a free running clock and is active make sure the BSCAN_SWITCE_USER_MASK device property in vivado hardware manager reflects the […]
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Fpga development notes (II): Gowin FPGA development software Gowin and Gowin fpga basic development process
preamble This article installs Gowin, Gowin’s development software, and describes the development environment and complete download and runtime of a program based on Gowin’s fpga. Gowin Software summarize Gowin software is the FPGA development software of Guangdong Gowin Semiconductor Co. download address http://www.gowinsemi.com.cn Apply for license Apply for license at http://www.gowinsemi.com.cn/faq_view.aspx There is also a […]
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32 Learning Websites about FPGAs
Language Learning Sites 1、HDLbits Website address:https://hdlbits.01xz.net/wiki/Main_Page Online answer and compilation site for learning Verilog with many topics and informative.Great for Verilog beginners!!!! 2. Niuqi.com Website address:https://www.nowcoder.com/exam/oj?page=1&tab=Verilog%E7%AF%87&topicId=311 Similar to LeetCode’s Brush Up website, which has recently added a Verilog section that can be simulated online to produce results, somewhat similar to theHDLbits , more suitable for […]
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Xilinx IP core serdes simulation and use for GTX
Platform: vivado 2017.4 Chip: xc7k325tfbg676-2 (active) Learning about GTX development. Use the official IP cores provided by xilinx. Recently after studying the PCIE protocol, using logic to parse the PCIE protocol code various packet headers. Then what is used for data transmission outside? Here is the use of GTX high-speed serial bus. So what is […]